Mr. Seegers received his Bachelor of Science degree in Computer Engineering, summa cum laude, from Texas A&M University, where he specialized in computer architecture and software engineering. At Texas A&M, Mr. Seegers was a member of the engineering honor society Tau Beta Pi, and participated in several student service projects (such as The Big Event) to help the College Station community.
Mr. Seegers is also well-versed in various aspects of computer and processor architecture, including arithmetic-logic unit design, delay and power estimation, clock distribution, logic effort, and gate sizing. As a student, Mr. Seegers designed a processor pipeline in Verilog (a hardware description language) that implemented the MIPS instruction set.
Texas A&M University
- B.S., Computer Engineering, summa cum laude
- Tau Beta Pi